This invention relates generally to digital-to-analog (D/A) converters and, more particularly, to data converters of the type known as one-bit return-to-zero D/A converters. Conversion of data from digital to analog form is needed in a wide variety of electronic equipment, such as communication systems, which use digital processing internally but must usually communicate with the outside world in analog form. For example, digital recording and playback systems have a need to convert digital data retrieved from a recording medium to analog signals for output to loudspeakers or earphones.
The one-bit return-to-zero D/A converter is used in a variety of these applications. The term “one-bit” refers, of course, to the ability of the converter to convert one bit of digital data to analog form. It may seem at first that a one-bit D/A converter would have limited utility since it can provide an analog output with just two possible states. However, the one-bit D/A converter is an extremely useful “building block” in the design of more powerful D/A converters. When used to process the digital output from a modulator known as a delta-sigma modulator, the one-bit D/A converter provides a two-state analog output, which, when averaged over time, accurately reflects the value of a multi-bit input signal to the delta-sigma modulator. Thus, when used in association with a delta-sigma modulator, the one-bit D/A converter provides an output that, when smoothed by appropriate filtering, reflects the value of the multi-bit input signal. In a slightly different context, an N-bit D/A converter can be configured by summing the output currents from multiple (2N-1) individual one-bit converters. This configuration is often referred to as a “unit element” D/A converter.
In one important application area, one-bit DACs are of interest to those involved in developing so-called “software” radio systems, which are easily reconfigurable communication systems that use digital signal processing for the most part. To reduce the proportion of analog circuitry in these systems, it is desirable to position the necessary data converters as close as possible to the radio antennas. High-speed one-bit return-to-zero D/A converters are key elements in the design of such radio systems.
An important reason for designers to use one-bit D/A converters is their inherent simplicity compared with conventional current summing D/A converters. More traditional D/A converters rely on summing of currents representative of contributions from each of the digital input bit positions, but this approach requires the use of a summing network of matched resistors. Because the one-bit D/A converter uses no analog components at all, it is not only cheaper but is inherently linear and, therefore, more accurate than current summing converters.
The term “return-to-zero” refers to a basic type of D/A converter in which the output signal returns to a zero value before assuming a new analog value reflective of the digital input state at the next digital input clock cycle. In a one-bit D/A converter of typical design, a constant current source is switched between an enabled state in which current is routed along one of two paths, as determined by the input data state, and a current “parking” state in which the current is routed along an alternate path that results in a zero output signal. The present invention is concerned with eliminating output inaccuracies that can result from the way in which a one-bit differential return-to-zero (RTZ) D/A converter is typically implemented.
As described in more detail below, the one-bit D/A converter is configured to include a constant current source switched by clock signals between the enabled state and the current parking state. When in the enabled state, the current is switched by differential digital input signals through one of two parallel paths, resulting in generation of differential output signals corresponding to the input signals. The output signals are also differential, in the sense that, in most applications, a processing module downstream of the D/A converter uses the difference between the output signals as the output value. In the current parking state, the current is diverted through two parallel paths, through diodes (or transistors configured as diodes), resulting in two equal voltages being impressed on the differential outputs, and consequently providing a zero differential output.
Unfortunately, the manner in which the differential RTZ D/A converter is implemented in the prior art often causes an imbalance between the two individual output voltages. Although the outputs behave well when considered differentially, the two single-ended output voltages are typically not symmetrical with each other and, therefore, can possibly be a hidden source of noise in any application in which the converter is used. Moreover, some applications do not use the differential form of the output signal, but use one single-ended output or the other. In that case, it is imperative that each single-ended output signal is well behaved and not influenced by any asymmetry in the current parking circuitry.
In the prior art, the current parking circuit included two diodes coupled to respective load resistors associated with the data input circuits. In the current parking mode, these diodes draw equal currents and produce equal output voltages, or a differential output of zero. When the converter is switched back to the enabled state and the diodes are switched off, each diode junction capacitance contains a residual charge, which will rapidly dissipate through any available discharge path. Unfortunately, however, only one of the two diodes has a good discharge path, through the circuit that has been enabled by the data signal. The other diode is effectively isolated and discharges more slowly during the transition to the enabled phase. Therefore, there is an inherent imbalance between the two single-ended outputs at the transition back to the enabled phase. Although this imbalance is of less consequence if differential outputs are used, its effects become more pronounced as the current parking periods are made smaller, i.e., at higher frequencies of operation. Accordingly, there is a need for improvement of the prior art one-bit return-to-zero D/A converter architecture. Ideally, what is needed is a converter that provides balanced differential outputs that are not affected by the asymmetrical diode discharge problem described above, such that either of the outputs may be used individually in downstream processing. The present invention satisfies this need.